Intel Announces PowerVia Technology for Efficient Power Delivery on Chips

Intel announced its new PowerVia technology at the VLSI Symposium 2023, which is expected to revolutionize the industry’s approach to power delivery networks. PowerVia technology will be used on the E-Core chip manufactured using Intel 4 nodes, and its operational efficiency will be exhibited during the symposium, which is scheduled to be held from June 11th to 16th.

Conventional chips have power and signal interconnections distributed over multiple metal layers. PowerVia technology, on the other hand, dedicates a specific layer for power delivery, effectively decoupling it from the signal wiring layer. This approach allows for vertical power transfer through dedicated power through silicon vias (TSVs) or PowerVia (vertical connections between the top and bottom sides of the chip).

By powering directly from the backside of the chip, PowerVia reduces power supply noise and resistive losses, optimizes power distribution, and improves overall energy efficiency. PowerVia technology is expected to debut on the Intel 20A node in 2024, but it has already been implemented on the Intel 4 node in order to learn and present its mechanism and implementation method to Intel Foundry Service (IFS) customers.

The benefits of PowerVia technology extend beyond higher frequencies and lower IR drops. As logic scales, more transistors are packed into a smaller space, resulting in higher heat densities. PowerVia technology should help to reduce this problem and allow heat to escape more efficiently.

During the VLSI Symposium 2023, Intel presented a paper introducing a design made with Intel 4 technology and implemented E-Core only on the test chip. The pre-and post-silicon findings demonstrated that PowerVia technology enabled over 90% standard cell utilization in large areas of the core, showing over 5% frequency gain in silicon due to reduced IR drop. Post-silicon debugging also showed that PowerVia technology simplified throughput times, albeit slightly longer, and demonstrated that they are acceptable. The thermal performance of the PowerVia test chips matched the high power densities expected from the shrinking logic.

PowerVia technology has the potential to improve the overall energy efficiency and thermal management of future chips and could potentially become the industry standard for power delivery networks in the years to come.

Meet Adwaith, a tech-savvy editor who's all about gadgets and gizmos. With a degree in Computer Engineering and a passion for all things tech, he's been guiding readers through the world of hardware for 10 years. Known for his clear, insightful reviews, Adwaith is the trusted voice behind TechLog360. Off-duty, he loves building PCs for charity.


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