NVIDIA has introduced AutoDMP (Automated DREAMPlace-based Macro Placement), a new tool that utilizes artificial intelligence (AI) to optimize chip design. AutoDMP uses AI to automate putting macros, big blocks of integrated circuits (ICs) commonly used in memory and analogue devices.
Macro placement is an important stage in a chip’s design since it substantially influences its performance, power consumption, and area. AutoDMP can assist chip designers in improving macro placement by automatically investigating a larger range of alternative locations and optimizing placements for various factors such as performance, power consumption, and area.
AutoDMP is built on the DREAMPlace placer, an AI-accelerated tool for conventional cell placement. DREAMPlace uses artificial intelligence to automate the process of arranging standard cells, which are the basic building blocks of integrated circuits. DREAMPlace has been proven to be substantially quicker than traditional placers at placing ordinary cells, while AutoDMP is projected to be much faster at placing macros than typical macro placers.
AutoDMP is still in development. However, NVIDIA has demonstrated that it can increase macro placement by up to 30%. AutoDMP is expected to be accessible to chip designers soon.
AutoDMP offers several benefits to chip designers, including:
- Improved performance: AutoDMP can help to enhance chip performance by optimizing macro placement.
- Decreased power consumption: By optimizing macro placement, AutoDMP can assist in minimizing chip power consumption.
- Decreased chip area: By optimizing macro placement, AutoDMP can assist in minimizing chip area.
- Improved design productivity: By automating the process of installing macros, AutoDMP can assist chip designers in boosting their design productivity.
AutoDMP is an exciting new chip design tool that is predicted to have a substantial influence on the industry. AutoDMP is expected to be accessible to chip designers shortly and will aid in improving chip performance, power consumption, area, and design productivity.